Medium-grain reconfigurable hardware (MGRH) architectures incorporate the power of a dedicated digital signal processor (DSP) and the flexibility of a field-programmable gate array (FPGA). Traditionally, MGRH design has been performed using low-level tools. This thesis report presents a new software application, the HiPerCopS Integrated Development Environment (IDE), which facilitates the design and simulation of MGRH systems.

The HiPerCopS IDE uses a software architecture that mimics the physical setup of an MGRH device. It provides a set of libraries that take advantage of inherent hierarchical relationships, abstracting low-level details by handling them automatically. The IDE features a tool for graphical system design, allowing users to design systems by focusing on the relationships between components, not the inner workings of the components themselves.

Since it is targets a reconfigurable hardware architecture, the HiPerCopS IDE supports the the ability to  map systems designs to a device. This thesis report introduces a number of mapping algorithms to the HiPerCopS architecture, and compares their respective merits. The IDE implements these algorithms, allowing users to choose the approach most suitable for their needs.

The HiPerCopS IDE has the ability to run simulations on a given system design. It processes input data from the user and returns a set of results and execution statistics. This allows the user to test their designs in a fast and efficient manner, without the costs associated with implementation on an actual physical device.

It is expected that the HiPerCopS IDE will help accelerate the research of MGRH architectures. A typical use case scenario is presented, giving a step-by-step example of system design and simulation. This paper also suggests future enhancements that will increase the usability and value of the IDE.